A general structure using a cascade of two stages with digital all-pass filters (DAFs) for designing two-dimensional (2-D) recursive circularly symmetric digital low-pass filters (CS-DLFs). The first stage is a parallel connection of a 2-D DAF and a 2-D pure delay block. The second stage uses a parallel connection of a 1-D DAF and a 1-D pure delay block. Design results with nearly circularly-symmetric magnitude response and approximately linear phase can be achieved satisfactorily

A power-saving band-gap reference (BGR) circuit for low-voltage operations is proposed by Chao-Jui Liang, Chiu-Chiao Chung and Hongchin Lin using the sub-threshold current source and a fraction of VBE in parasitic bipolar transistors to generate a reference voltage of 170?mV with chip area of 0.029?mm2

A novel method of the gate signal generation for the interleaved LLC converter is proposed, which is based on the relationship between the output signal of a toggle flipflop having the double period of the input clock signal and the output gate signal of the LLC controller having almost half duty cycle. The gate signals for the master and slave converters are generated using the rising and falling edge instants from the original control gate signal of the controller, respectively. Therefore, the required 90 degree phase difference between two signals can be always kept at any instant and at any output load condition